instruction execution

英 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

美 [ɪnˈstrʌkʃn ˌeksɪˈkjuːʃn]

网络  指令执行

计算机

英英释义

noun

• (computer science) the process of carrying out an instruction by a computer
  Synonym:execution

双语例句

• Propose the run time dispatched instruction decoder and issue logic based on instruction execution cycle.
  提出基于指令类型动态分配的译码器设计方案和基于指令执行周期的动态逻辑发射方案。
• Activity is a unit of instruction execution, and is the building block of a process.
  活动（activity）是指令执行的一个单元，它是一个流程的基本组成部分。
• This article probes into a kind of encryption method for files, which is different from the usual way. It also studies the encryption method for instruction inverse execution, which means how to use inverse instruction stream to realize the file encryption.
  研究一种打破常规的文件加密方法，指令的逆运动加密方法，即如何采用逆指令流来实现对计算机文件的加密。
• The article essentially describes such points as instruction execution and memory management in constructing a virtual running embedded system.
  文中着重介绍了构建嵌入式虚拟运行平台中的指令执行、存储器管理等核心技术问题。
• The Digital Signal Processing which is regarded as CPU on board has some advantages, such as fast instruction execution, high bus bandwidth, and high speed real-time data processing.
  数据采集卡部分使用使用DSP来作采集卡CPU具有指令执行速度快、总线带宽高、可以完成数据的高速实时处理等优点。
• The model of instruction level parallel program execution
  指令级并行程序执行模型
• Compile the assembler into machine code so that generate PLE file in order to implement the execution mechanism of PLC virtual machine. In this way, the instruction execution speed of PLC is greatly increased and we can save much memory.
  用汇编编译器编译转变成功的汇编程序产生机器码，从而构造出可执行文件&PLE文件，实现PLC虚拟机的机器码执行机制，这样大大提高了PLC指令的执行速度，同时大大节约了内存空间。
• A4-stage instruction pipeline for instruction execution makes at-speed test possible.
  四级指令流水线的引入使全速测试成为可能。
• Composite electronic System is the hinge of the Pico-satellite, which undertakes the work of data processing, data storage, data transmission, Instruction code transmission and Instruction execution.
  综合电子系统是皮卫星的数据和指令枢纽，承担皮卫星数据处理、数据存储、数据传输及指令收发、响应等重要任务，是皮卫星的核心组成部分。
• This paper has discussed the relationship between the machine cycle and instruction execution time for superscalar RISC architecture, issuing multiple instructions in one machine cycle. Several new design features of superscalar RISC architecture with single execution unit and multiple function units have been analysed.
  本文讨论超标量RISC结构中单周期发多条指令中周期和执行指令时间的相对关系，并分析了新型超标量RISC结构的实现方案，其中包括具有单个执行部件和多个执行部件的结构。